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An efficient image steganographic scheme for a real-time embedded system and its hardware implementation on AMD Xilinx Zynq-7000 APSoC platform

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Abstract

As a pivotal advance in the field of information security, steganography holds a crucial place in concealing sensitive information. It is the technique of hiding secret data within a digital media carrier, such as an image. An image steganographic scheme conceals secret data in a digital image by manipulating pixel values in a way that the data is undetectable to unauthorized parties in communication channels. These schemes are widely used for various real-time applications, including but not limited to content authentication, copyright protection, and biometric data protection. To effectively process image steganographic schemes in real-time applications, it is important to reduce computational delay and increase throughput. Implementing these schemes on a reconfigurable hardware platform is an efficient way to achieve these tasks. In this paper, we present a reconfigurable embedded system for an efficient steganographic scheme that embeds and recovers secret data in digital images using the AMD Xilinx Zynq-7000 all programmable system-on-chip (APSoC) platform. The system demonstrates real-time processing capabilities, delivering a frame rate of 30.7 FPS for a full high-definition RGB image, surpassing recent hardware implementations in terms of speed, resource utilization, and system throughput.

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Acknowledgements

This work was supported in part by the Natural Sciences and Engineering Research Council (NSERC) of Canada and in part by the Regroupement Strategique en Microelectronique du Quebec (ReSMiQ).

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All the authors conceived the idea. SH developed the theory and performed the experiments. All the authors verified the analytical methods, discussed the results and contributed to the final manuscript.

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Correspondence to M. Omair Ahmad.

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Harb, S., Ahmad, M.O. & Swamy, M.N.S. An efficient image steganographic scheme for a real-time embedded system and its hardware implementation on AMD Xilinx Zynq-7000 APSoC platform. J Real-Time Image Proc 20, 46 (2023). https://doi.org/10.1007/s11554-023-01302-x

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