DE20023803U1 - TURBO-interleaving - Google Patents

Abstract

Turbo coder, which includes:
a first encoder (111) adapted to encode a frame of input information bits to produce first encoded symbols, the frame of input information bits having R groups of C information bits, and each Group of a single row corresponds;
a two-dimensional interleaver arranged to receive the frame of input information bits, to interleave each row of the frame of input information bits within a row, and then to interleave within a row the position of an information Exchanging bits at a last position of a last row of rows nested within a row for a previous position within the last row of R rows, and
a second encoder (113) arranged to encode the output of the interleaver to produce second coded symbols.

Description

BACKGROUND OF THE INVENTION

1. Field of the invention

The The present invention relates generally to a turbo-coder, used for Radio communication systems (including satellite, ISDN, digital cellular, W-CDMA and IMT-2000 systems), and in particular an internal one Interleaver or an internal interleaver of a Turbo coder.

2. Description of the related State of the art

Generally calculates an interleaver used for a turbo encoder Address of an input information word at random (randomized) and improves a ward characteristic of a codeword. In particular, it has been decided that a turbo code in one additional Channel (or a data transmission channel) from IMT-2000 (or CDMA-2000) and IS-95C Air interfaces and in a data channel proposed by UMTS (Universal Mobile Telecommunication System) used by ETSI (European Telecommunication Standards Institute) will be. Accordingly, a method for implementing an interleaver For this Purpose required. additionally The invention relates to an error correction code that greatly improving the performance of existing and future, influenced by digital communication systems.

For one existing internal interleaver for a turbo-encoder (hereafter referred to as a turbo interleaver) are different interleavers been proposed, such as a PN (pseudo noise) random interleaver, a random interleaver, a block interleaver, a non-linear interleaver and an S-random interleaver. However, so far such interleavers only algorithms designed to their performance with regard to scientific investigations, as opposed to one Implementation, to improve. Therefore, if an actual System that takes into account hardware implementation complexity become. The following are the specifics and problems that when using conventional Interleaver for the turbo encoder occur.

The capacity of the turbo-coder hangs from its internal interleaver. Generally improves an increase in the Input frame size or Block size (i.e. the number of information bits contained in a frame) the effectiveness of the turbo coder. However, an enlargement of the Interleaver size one geometric increase of the calculations. That's why it's general not possible, the interleaver for the size Frame size or Block size to execute.

Therefore, interleavers are generally implemented by determining conditions that meet various given criteria. These criteria are as follows:
Distance Property: The distance or spacing between adjacent code word symbols should be maintained to a certain extent. This has the same function as a code-word-distance property of the convolutional code, and as an indication criterion, a minimum free space containing a value of a code word path or code word sequence is used is the minimum Hamming weight of the code symbol sequences (or code word paths) output on the grid. In general, the interleaver should, if possible, be designed so that, as far as possible, it has a longer free distance.

Random property (Random Property): A correlation factor between output word symbols after Nesting should be much lower than a correlation factor between original input word symbols before interleaving be. This means that the randomization between the output word symbols Completely carried out should be. this leads to to a direct effect on the quality of third-party information that generated during continuous decoding.

Even though the above criteria for a general turbo interleaver are applicable, it is difficult to unequivocal these properties analyze as the interleaver size increases.

In addition, another problem is that the minimum free space of the turbo code varies according to the type of the input code word. That is, if the input information word defines a specific sequence pattern as a Critical Information Sequence Pattern (Critical Information Sequence Pattern CISP), which has a very small value of the free spacing of the output code symbols generated by the turbo encoder. If the input information word has a Hamming weight 2, the CISP occurs when the input information word has two information bits of value "1", and may also occur if the input information word is three or more information bits of value "1". However, in most cases, when the input information word has two information bits of value "1", the minimum free space is formed and most error events occur under this condition. Therefore, when the turbo interleaver is designed, analysis is generally made for the case where the input information word has the Hamming weight 2. One reason that the CISP exists is that the turbo encoder generally has a Recursive Systematic Convolutional Codes (RSC) encoder for the component encoders shown in FIG 1 (described further below). To improve the operation of the turbo coder, a basic polynomial for a return polynomial (gf (x) of 1 ) can be used by the generator polynomials for the component encoder. Therefore, when the number of memories of the RSC encoder is m, a feedback sequence generated by the feedback polynomial continuously repeats the same pattern under a period of 2 ^m -1. Therefore, if the input information word "1" is received at the time corresponding to this period, the same information bits are XORed, so that the state of the RSC encoder becomes an all-zero state from now on. Zero-state) so as to produce the output symbols with everywhere-0's. This means that the Hamming weight of the codeword has a constant value after this result, generated by the RSC coder. This means that the free space of the turbo code is maintained after this time and that the CISP becomes a major cause of a reduction in the free space of the turbo-coder, whereas, as noted above, a larger, free space is desirable.

Around in this case (in the turbo-interleaver of the prior art) to increase the free distance, the turbo interleaver randomly scatters the CISP input information word, so a reduction of the free distance at the output symbol of the RSC encoder to prevent the other components.

The The above properties are basic features of the known Turbo interleaver. However, it is conventional for the CISP the information word has the minimum Hamming weight, if the input information word has the Hamming weight 2. In other words, the fact that the CISP can be generated even if the input information word has Hamming weight 1 (i.e., if the input information word has an information bit of value "1"), if the information word input to the turbo encoder is the type of a block, constructed from frames or blocks, possessed.

To the Example shows a Prime Interleaver (PIL) acting as the working model of the turbo-code interleaver, specified provided by the current UMTS standard, such problems, and thus has a reduced free distance value. The means that the implementation algorithm of the model PIL turbo interleaver 3 stages with the second stage, which plays the most important role, a random permutation with respect to the information bits of the respective groups. The second stage will be in three cases divided case A, case B and case C, and case B always includes the case where the free space is reduced when the input information word has the Hamming weight 1. In addition, even Case C includes a possibility in that such an event will occur. The detailed Problems will be later with reference to the PIL.

Summarized should, if different interleaver sizes are required, and the hardware implementation complexity in the IMT-2000 or UMTS System is limited, the turbo interleaver can be implemented in such a way that the optimal interleaver performance is guaranteed. That means the needed interleaver will be able to should be a uniform How it works for to guarantee different nesting sizes and at the same time fulfills the above required properties. More precisely There are different types of interleavers for a PCCC (Parallel Concatenated Convolutional Codes) Turbo Interleaver has been proposed and a LCS (Linear Congruential Sequence) turbo interleaver is provisionally known as the turbo interleaver been defined in the IMT-2000 (or CDMA-2000) and IS-95C specifications. However, most of these turbo interleaver have problems with it CISP with a Hamming weight of 1 and also are the implementation details not yet defined. Therefore, the present invention proposes a solution for the Problems of a turbo interleaver, and a new device for running the Turbo Interleavers, before. additionally the invention shows the PIL interleaver, which is based on a specification for the UMTS Turbo Interleavers oriented, and proposes a solution of the corresponding problem with interleavers before.

• 1) Der Turbo-Interleaver ist für eine infinite Frame- bzw. Block-Größe auf der Basis des CISP ausgelegt, für das das Eingangs-Informations-Wort das Hamming-Gewicht 2 besitzt, ohne Berücksichtigung der Tatsache, dass eine Bestimmung des CISP gemäß dem Typ des Eingangs-Informations-Worts auf die Frame- bzw. Block-Größe beschränkt ist. In einem tatsächlichen System allerdings besitzt der Frame bzw. Block eine finite Größe, was demzufolge eine Herabsetzung des freien Abstands des Turbo-Codes bewirkt.
• 2) Beim Implementieren des existierenden Turbo-Interleavers wurde die Tatsache, dass das Eingangs-Informations-Wort ein Hamming-Gewicht 1 haben kann, nicht berücksichtigt. Mit anderen Worten sollte, für die finite Frame- bzw. Block-Größe, die Turbo-Interleaver-Design-Regel unter Berücksichtigung der Tatsache bestimmt werden, dass der minimale freie Abstand, erzeugt in dem PCCC Turbo-Codierer, durch das CISP bestimmt wird, das das Hamming-Gewicht 1 besitzt. Dies wurde allerdings nicht vollständig für die existierenden Turbo-Interleaver berücksichtigt.
• 3) Der Prime-Interleaver (PIL), implementiert entsprechend der Arbeitsvorgabe des Turbo-Code-Interleavers definiert durch die UMTS Spezifikation, unterliegt solchen Problemen, was zu einer verschlechterten freien Abstands-Leistungsfähigkeit führt.

In summary, the prior art has the following disadvantages:

• 1) The turbo interleaver is designed for an infinite frame size based on the CISP for which the input information word has the Hamming weight 2, ignoring the fact that a determination of the CISP according to the type of input information word is limited to the frame or block size. In an actual system, however, the frame has a finite size, thus causing a reduction in the free space of the turbo code.
• 2) In implementing the existing turbo interleaver, the fact that the input information word may have Hamming weight 1 has not been considered. In other words, for the finite frame or block size, the turbo interleaver design rule should be determined taking into account the fact that the minimum free space created in the PCCC turbo encoder is determined by the CISP that owns the Hamming Weight 1. However, this was not fully considered for the existing turbo interleaver.
• 3) The prime interleaver (PIL), implemented according to the work of the turbo code interleaver defined by the UMTS specification, is subject to such problems, resulting in degraded free space performance.

It It is therefore an object of the present invention to provide an interleaving device or an interleaver for analyzing properties of a turbo interleaver and a property of a critical information sequence pattern (Critical Information Sequence Pattern - CISP) to create the capacity to improve the turbo interleaver.

It Another object of the present invention is an interleaving device for improving the free space performance of a turbo code in case to create where an input information word is a Hamming weight 1 has, if the entered information word in the turbo interleaver has a block type built from frames.

It Another object of the present invention is an interleaving device to release the To create problems that the free distance is reduced, if an input information word Hamming weight 1 in a prime interleaver (PIL), the turbo interleaver according to the UMTS specification is, owns.

Around To accomplish the above tasks becomes a two-dimensional one Nesting created that dividing a Frame of input information bits in a variety of groups and then Saving the subdivided groups in a memory, permuting the information bits of the groups according to a certain rule and Move an information bit that is at the last position the last group is located at a position that is the last group precedes, as well as selecting the Groups according to one predetermined order and selecting one of the information bits in the selected Group includes.

SHORT DESCRIPTION THE DRAWINGS

The The foregoing and other objects, features and advantages of the present invention The invention will become apparent from the following detailed description considering the attached Drawings become apparent, wherein:

1 shows a diagram illustrating a general, parallel turbo-encoder;

2 shows a diagram illustrating a general interleaver;

3 shows a diagram illustrating a general de-interleaver;

4 shows a diagram illustrating a method for generating a critical information sequence pattern (CISP) in a turbo interleaver;

5 shows a diagram illustrating another method for generating the CISP in the turbo interleaver;

6 shows a diagram illustrating a method for solving a problem that occurs when the CISP of 4 is produced;

7 shows a diagram illustrating a method for solving a problem that occurs when the CISP of 5 is produced;

8th shows a diagram illustrating another method for solving a problem that occurs when the CISP is generated in the turbo interleaver;

9 shows a diagram illustrating a method for generating the CISP in a two-dimensional turbo interleaver;

10 shows a diagram illustrating a method for solving a problem that occurs when the CISP of 7 is produced;

11 10 is a block diagram illustrating an interleaver for suppressing the CISP according to an embodiment of the present invention; and

12 a flowchart for explaining an interleaving method of a modified PIL (Prime Interleaver) according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment The present invention will hereinafter be referred to by reference on the attached Drawings described. The following description will suffice known functions or constructions are not described in detail because they would disguise the invention in unnecessary detail.

In front In describing the invention, the description will be the problems which occur when an input information word, the one of the existing turbo interleaver / de-interleaver lying design criteria, on a frame unit basis or block unit basis and analyze the effect the CISP has on a Hamming weight 1 on the Hamming weight of the output code symbols. Next the description will indicate a procedure to solve the problems and the performance difference by analysis of the minimum free distance.

1 FIG. 12 illustrates a structure of a general, parallel turbo-coder disclosed in detail in U.S. Patent No. 5,446,474, issued August 29, 1995, which is incorporated herein by reference.

As 1 shows, the turbo-encoder comprises a first component encoder 111 for encoding input frame data, an interleaver 112 for interleaving the input frame data and a second component encoder 113 for encoding an output of the interleaver 112 , A well-known RSC (Recursive Systematic Convolutional CODES) coder is typically used for the first and second component coders 111 and 113 used. The following is the first RSC component encoder 111 referred to as RSC1 and the second RSC component encoder 113 is called RSC2. Furthermore, the interleaver has 112 the same size as the input information bit frame and assigns the sequence of information bits that are to the second component encoder 113 can be supplied, to reduce the correlation between the information bits.

2 and 3 represent in each case fundamental structures of the general interleaver and the deinterleaver.

With reference to 2 For example, an interleaver for interleaving frame data output from the first component encoder will be described. An address generator 211 generates a read address for changing the sequence of the input data bits according to an input frame data size L and an input clock, and supplies an interleaver memory 212 with the generated, read address. The interleaver memory 212 sequentially stores input data in a write mode of operation and outputs the stored data according to the read address supplied from the address generator 211 , in a read mode of operation. A counter 213 counts the input clock and supplies the clock count value to the interleaver memory 212 as a write address. As described above, the interleaver sequentially stores input data in the interleaver memory 212 in write mode and outputs the data stored in the interleaver memory 212 , according to the read address, supplied by the address generator 211 , in read-operating mode. Alternatively, it is also possible to sequence the input data bits before their memory to change in the interleaver memory in the write mode of operation and to read sequentially the stored data in the read mode of operation.

With reference to 3 a de-interleaver is described. An address generator 311 generates a write address for restoring the sequence of input data bits to the original order corresponding to an input frame data L and an input clock, and supplies to a de-interleaver memory 312 the generated write address. The de-interleaver memory 312 stores input data corresponding to that from the address generator 311 supplied write address in the write mode of operation and outputs sequentially the stored data in the read operation mode. A counter 313 counts the input clock and supplies the clock count to the interleaver memory 312 as a read address. As described above, the de-interleaver has the same structure as the interleaver, but has the opposite operation to the interleaver. The deinterleaver differs from the interleaver only in that the input data has different sequences in both the read and write modes. Therefore, the following description will be made for simplicity only with reference to the interleaver.

There the turbo code is a linear block code, has a new information word, obtained by adding a non-zero information word to an input information word, generally the same codeword distribution property. Therefore even though the property is based on the all-zero information word (All-Zero) is designed to be the same functioning, compared with the way of functioning using the non-zero information word is determined. As a result, a description will be given below Reference may be made to the case where the input information word the all-zero codeword is. This means that the functioning of the turbo code under the Assumption will be analyzed that the input information word anywhere zero bits and only a given information bit is "1".

To improve the performance of the turbo coder, a polynomial of polynomial for a return polynomial from a generator polynomial can be used for the component coder. The return polynomial is given by expressing a tapping which is a feedback in the RSC component encoders 111 . 113 of the 1 in a polynomial, and the return polynomial is defined as gf (x). In case of 1 gf (x) = 1 + x ² + x ³ . This means that the highest order indicates the depth of a memory, and the rightmost connection determines whether the coefficient x ³ of gf (x) is 0 or 1. Therefore, when the number of memories for the RSC encoder is m, a return sequence generated by the return polynomial continuously repeats the same pattern under a period of 2 ^m -1. Accordingly, when an input information word " 1 "is initially received in accordance with this period (eg, for m = 3, when an input information word of" 10000001 ... "is received), the same information bits are XORed, and hence the state of the RSC encoder becomes an all-zero state, thus generating output symbols of all 0's. This means that the Hamming weight of the codeword generated by the RSC encoder has the constant value of 1 after this event. This further means that the free space of the turbo code is maintained after this time, and the CISP becomes a major cause of a reduction in the free space of the turbo-coder.

In this case, to increase the free space, the turbo interleaver randomly distributes the CISP input information word so as to prevent a decrease in the free space on the output symbol of the other component RSC encoder. Table 1 below shows a feedback sequence generated from gf (x) = 1 + x ² + x ³ . In Table 1, X (t) indicates an input information bit at a time t of the input information word. Furthermore, m (t), m (t-1), and m (t-2) each indicate three memory states of the RSC encoder. Since the memory number is 3 here, the period is 2 ³ - 1 = 1.

[Table 1]

Based from Table 1, it should be noted that if X (t) = 1 at the time t = 7, then m (t), m (t - 1) and m (t - 2) are louder Zero conditions become. That's why the Hamming weight the following output symbols always zero. In this case, it will, if the turbo interleaver supplies the RSC2 with the input information sequence "10000001000 ..." as it does is the Hamming weight of the output symbols in the time after t = 7 do not change, even in the RSC2, using the same return polynomial from the same Reason. This causes a decrease in the free distance of the whole Output symbols of the turbo-coder. To prevent this, the changes Turbo Interleaver the original input information sequence "10000001000 ..." to an input information sequence a different pattern (for example, a position of the Information bits "1" corresponding to 110000000 ...) and deliver the resulting sequence to the RSC2. Therefore, it increases even though an increase in the Hamming weight in the RSC1 is stopped, the Hamming weight continuously in the RSC2, so that the total free distance of the turbo-coder elevated. This is because the return polynomial, this is the Infinite Impulse Response (IIR) filter type has continuously generated the infinite output symbol "1" just for an input information bit "1". Equation 1 below the relationship between the RSC1 and the RSC2 in terms of Hamming weight or Turbo coder clear distance.

[Equation 1]

HW (output code sequence) = HW (RSC1 code sequence) + HW (RSC2 code sequence) where NW is the Hamming weight is.

Out Equation 1 states that a Hamming weight balance between RSC1 and RSC2 is very important. In particular, it should be noted that the minimum, free distance of the turbo code for the minimum Hamming weight of the input information word is generated when the IIR (Infinite Impulse Response) characteristic of the RSC coder becomes. Generally, the minimum clearance is achieved when, as mentioned above, the input information word has the Hamming weight 2.

Indeed occurs as described above, the minimum free distance when the input information word is the Hamming Weight 3, 4, 5, ... possesses, as well as when the input information word the Hamming weight has 2. This occurs when the input information word is received on a frame unit basis as follows.

To the Example, if only the information bit, arranged at the last position of the input information word, i. the last Position of the frame, "1" is and all others 0'en information bits are, the Hamming Weight of the Input Information Word 1. In In this case, the number of symbols becomes "1", output from the RSC1, very small, because there is not further an input information word is available. Of course, if zero-tail bits are used, there are two Symbols, however, these are used independently in contrast to be subject to turbo nesting. Therefore It is assumed here that the weight is increased slightly. As the constant weight is added, this is an analysis be excluded from the interleaver. In this case is based from Equation 1 establish that the RSC2 is a large number of output symbols should produce "1", to increase the total, clear distance.

Well, with reference to the 4 to 10 , a comparative description taking into account the problems of the prior art and the solutions of the problems made.

In the 4 to 10 the cross-hatched portions indicate the position where the input information bit is "1", and the other portions indicate the positions where the input information bit is "0".

If, as in 4 is shown, the turbo interleaver shifts (or permutes) the position of the input information word where the original symbol of the RSC1 is "1" to the last position of the frame after interleaving, the number of output becomes Symbols "1" generated by the RSC2 become very small. In this case, since RSC1 and RSC2 generate a very small number of output symbols "1" corresponding to Equation 1, the total free space drastically decreases. However, if, as in 5 7, the turbo interleaver shifts the position of the input information word where the original symbol of the RSC1 is "1" to the first position or a position near the leading position of the frame after interleaving, the number of output symbols "1" generated by the RSC2. This is because a plurality of symbols "1" over (N (interleaver size) -h (a number of "1")) (N (interleaver size) -h (the number of "1" s) state Transitions for the RSC2 encoder are output In this case, the RSC2 generates a large number of output symbols "1", thereby increasing the total free space.

In addition to the reduced free space that occurs when the internal interleaver shifts the input information bit "1" located at the last position of the frame to the last position of the frame, as in FIG 4 If one of two information bits of value "1" located at the end position of the frame will still be located at (or near) the ending position of the frame, even after interleaving, as shown in FIG 6 is shown, reduce the entire free distance.

For example, the Hamming weight of the input information word is 2 when the internal interleaver operates in frame mode, as shown in FIG 6 where two symbols arranged at the ending position of the frame are 1's and the other symbols are all 0's, even in this case, the number of output symbols "1" generated by the RSC1 becomes very small there is no further input information bit. Therefore, according to Equation 1, the RSC2 should generate a large number of output symbols "1" to increase the overall free distance. However, even if the turbo interleaver, as in 6 9, the position of the above two symbols shifts to the ending position (or close to the ending position) of the frame, even after interleaving, the RSC2 also generates a small number of output symbols "1". However, if, as in 7 7, the turbo interleaver shifts the position of the above two symbols to the foremost position (or near the foremost position) of the frame, which RSC2 generates a large number of symbols "1". That is, the RSC2 encoder outputs a plurality of symbols "1" over (N-H) state transitions (N = Interleaver Size, h = a number of the symbol "1"). In this case, the RSC2 therefore generates the increased number of output symbols "1" to thereby increase the total free space.

This principle can be extended to the case where the turbo interleaver operates in the frame mode, shown in FIG 8th where a plurality of information bits "1" exist at the ending period (or duration) of the frame and the other information bits are all 0's. Even in this case, the entire free space is increased by shifting the information bits existing at the ending position of the frame to the foremost position of the frame or to positions closer to the foremost position as shown in FIG 8th is shown. Of course, since the turbo code is the linear block code, the new information word obtained by adding a non-zero information word to such an information word retains the same property. Therefore, description will be made below on the basis of the all-zero information word.

• Bedingung 1: Beim Entwerten jedes Turbo-Interleavers sollten die Informations-Bits entsprechend einer spezifischen Periode von der letzten Position des Frame zu der vordersten Position des Frame durch Verschachtelung verschoben werden, um den freien Abstand des Turbo-Codes zu erhöhen.
• Bedingung 2: Die Informations-Bits entsprechend zu der letzten Position des Frame sollten durch Verschachtelung zu einer Position verschoben werden, die der letzten Position vorausgeht (falls möglich zu der vordersten Position des Frame), um den freien Abstand des Turbo-Codes zu erhöhen.

In summary, when invalidating the turbo interleaver, the following conditions as well as the randomness property and the distance characteristic should be satisfied to guarantee the performance of the turbo decoder and the free space of the turbo-coder.

• Condition 1: When invalidating each turbo interleaver, the information bits should be shifted by interleaving according to a specific period from the last position of the frame to the foremost position of the frame to increase the free space of the turbo code.
• Condition 2: The information bits corresponding to the last position of the frame should be moved by interleaving to a position preceding the last position (if possible to the front position) position of the frame) to increase the free space of the turbo code.

These conditions are applicable to a 2-dimensional turbo interleaver as well as the 1-dimensional interleaver described above. The 1-dimensional interleaver performs interleaving by looking at the input information frame as a group, as in FIGS 4 to 8th is shown. The 2-dimensional interleaver performs interleaving by dividing the input information frame into a plurality of groups. 9 represents a 2-dimensional interleaving, wherein the input information word has the Hamming weight 1.

As is shown, the input information bits become sequential into the respective groups (or rows). That means, the input information bits are sequentially input to the groups (or Rows) r0, r1, ..., r (R - 1) to be written. In each group, the input information bits become sequential written from left to right. After that, a turbo nesting algorithm changes fortuitously the positions of R × C Elements (i.e., input information bits), where R is the number of Rows is, C is the number of columns or, equivalently, the number of information bits in a group. In this case, it is desirable to have the turbo interleaving algorithm so Design that information bit, located at the last one Position (or rightmost position) of the last one Group, if possible should be located at the frontmost position when outputting. Naturally can, depending on from the order of a selection the groups, the input information bit, arranged at the last position, to the foremost position (or close to it) of the corresponding groups. Furthermore condition can 1 and condition 2 in a k-dimensional turbo interleaver (where k> 2) as well as in the Normalized 2-dimensional interleaver.

10 FIG. 12 illustrates a case where the input information word has the Hamming weight of over 2. As shown, the information bits arranged at the last position of the last group are shifted to the leading positions of the last group by interleaving. Of course, the detailed shift (or interleave) rule is determined according to an algorithm for a specific interleaver. The invention provides Condition 1 and Condition 2, which should necessarily be satisfied in determining the interleave control.

When next A description of the PIL interleaver is provided that describes the Has problems of the prior art, and then another Description of a solution the problems that the PIL Interleaver has.

• (i) finde minimale Primzahl p, so dass 0 = < (p + 1) – K/R
• (ii) falls (0 = < p – K/R), dann gehe zu (iii), ansonsten C = p + 1
• (iii) falls (0 = < p – 1 – K/R), dann C = p – 1, ansonsten C = p.

First stage, (1) determine a row number, so that
R = 10 is valid in the case that the number of input information bits is K 481 to 530, and
R = 20 is valid in the case that the number of input information bits K is any other block length except 481 to 530,
(2) determine a column number C such that for case 1 C = p = 53, where p = minimum prime, and for case 2

• (i) find minimum prime p such that 0 = <(p + 1) - K / R
• (ii) if (0 = <p - K / R), then go to (iii), otherwise C = p + 1
• (iii) if (0 = <p - 1 - K / R), then C = p - 1, otherwise C = p.

A second stage, case B is first described where C = p + 1 from a Nesting algorithm for the PIL interleaver, the preliminary was determined as a UMTS turbo coder. In equation 2 below R indicates the number of groups (or rows) and has one Value of R = 10 or R = 20. Furthermore, C gives the size of each Group and is determined by a prime number p closest to R / K, determined in step 1, corresponds to a value K / R, where K is the size of the actual Input information bits of a frame. In case-B always holds that C = p + 1. Therefore, the actual Size of the PIL Interleavers through R × C certain value greater than C is. Further, Cj (i) gives a position of the information bits on, obtained by accidental Permuting the position of the input information bits in the group based on an i-th group, where i = 0,1,2,3, ..., p. Additionally shows Pj is given an initial seed value for one jth row vector, and is initially given by the algorithm.

[Equation 2]

• B-1) A primitive root g0 is derived from a given random initialization constant table (3GPP TS 25.212 table 2; table of a prime number p and an associated root) is selected so that g0 is a root of a field based on the prime number p.
• B-2) constructing a base sequence C (i) to be used for row vector randomization (random generation) using the following formula. C (i) = [g0 × C (i-1)] mod p, i = 1, 2, 3, ..., p-2, C (0) = 1
• B-3) Select the minimum prime set {q _j , j = 0, 1, 2, ..., R - 1} such that gcd {q _j , p - 1} = 1, q _j > 6 and q _j > q _(j-1) where gcd is a largest common divisor and q ₀ = 1.
• B-4) {p _j , j = 0, 1, 2, ..., R - 1}, a new set of prime-phrases consisting of {q _j , j = 0, 1, 2, ..., R - 1}, such that p _{p (j)} = q _j , where J = 0, 1, ... R - 1 and p _(j) the inter-row permutation pattern defined in the third stage, is.
• B-5) elements of the j-th intra-row permutation as the following procedure. C j (i) = C ([i × p j ] mod (p-1)), i = 0, 1, 2, 3, ..., p-2, Cj (p-1) = 0, and C j (p) = p

A third step

Perform the row permutation based on the following p _(j) (j = 0,1,2, ..., R-1) patterns, where p _{(j) is} the original row position of the j-th permutation row.

The use of these patterns is as follows; when the number of the input information bits K is 320 to 480 bits, perform a group selection pattern p _A when the number of the input information bits K is 481 to 530 bits, carry group selection patterns p _C , when the number of the input information bits K is 531 to 2280 bits, perform a group selection pattern p _A , if the number of the input information bits K is 2281 to 2480 bits, perform a group selection pattern Selection pattern p _B by, when the number of the input information bits K is 2481 to 3160 bits, perform a group selection pattern p _A when the number of the input information bits K is 3161 to 3210 bits, perform a group selection pattern p _B , and when the number of an input information bit K is 3211 to 5114 bits, execute a group selection pattern p _A. The group selection pattern is as follows;
p _A : {19, 9, 14, 40, 2, 5, 7, 12, 18, 10, 8, 13, 17, 3, 1, 16, 6, 15, 11} for R = 20
p _B : {19, 9, 14, 40, 2, 5, 7, 12, 18, 16, 13, 17, 15, 3, 1, 6, 11, 8, 10} for R = 20
p _C : {9, 8, 7, 6, 5, 4, 3, 2, 1, 0} for R = 10.

It should be noted here that the last operation of B-5) is defined as C _j (p) = p. That is, when the position of the input information bit before interleaving is p, the position of the input information bit at the position p is maintained even after PIL interleaving. Therefore, for the last group (j = 19), the information bits C _R-1 (P) = C ₁₉ (p) existing at the last position retain the same position i = P as the last position of FIG. Group is. Therefore, Condition 2 is not satisfied for interpretation of the turbo interleaver.

The means that to solve the problem, the PIL interleaver has, algorithm step B-5) should be modified as follows. The invention provides six methods from B-5-1) to B-5-6), as an example. From these can optimize performance through simulations determined with regard to the properties of the turbo interleaver become.

• B-5-1) Positionen von C_R–1(0) und C_R–1(p) werden gegeneinander ausgetauscht. R = 10 oder 20
• B-5-2) Positionen von C_R–1(p – 1) und C_R–1(p) werden gegeneinander ausgetauscht. R = 10 oder 20
• B-5-3) für jedes j werden Positionen von C_j(0) und C_j(p) gegeneinander ausgetauscht. j = 0,1,2, ..., R – 1
• B-5-4) für jedes j werden Positionen von C_j(p – 1) und C_j(p) gegeneinander ausgetauscht. j = 0, 1, 2, ..., R – 1
• B-5-5) für jedes j wird eine optimale Austauschposition k für den verwendeten Verschachtelungs-Algorithmus aufgesucht, um Positionen von C_j(k) und C_j(p) gegeneinander auszutauschen.
• B-5-6) für eine (R – 1)-te Reihe wird eine optimale Austauschposition k für den verwendeten Verschachtelungs-Algorithmus gesucht, um Positionen von C_R–1(k) und C_R–1(p) gegeneinander auszutauschen.

One of the following 6 methods is selected.

• B-5-1) Positions of C _R-1 (0) and C _R-1 (p) are interchanged. R = 10 or 20
• B-5-2) Positions of C _R-1 (p-1) and C _R-1 (p) are interchanged. R = 10 or 20
• B-5-3) for each j, positions of C _j (0) and C _j (p) are interchanged. j = 0,1,2, ..., R - 1
• B-5-4) for each j, positions of C _j (p-1) and C _j (p) are interchanged. j = 0, 1, 2, ..., R - 1
• B-5-5) for each j, an optimal replacement position k for the interleaving algorithm used is searched to exchange positions of C _j (k) and C _j (p) with each other.
• B-5-6) for an (R-1) -th row, an optimal replacement position k for the interleaving algorithm used is searched for to exchange positions of C _R-1 (k) and C _R-1 (p).

The 11 and 12 FIG. 12 is a block diagram and a flowchart according to an embodiment of the present invention, respectively. FIG.

As 11 shows generates a row vector permutation block (or row vector permutation index generator) 912 an index for selecting a row vector according to counting of a row counter 911 and supplies the generated index to a high address buffer of the address buffer 918 , The row vector permutation block 912 is a group selector for sequential or random selection when the input information word is divided into a plurality of groups, the divided groups. A column vector permutation block (or column vector vector permutation index generator) 914 generated, depending on a modified PIL algorithm 915 , an index for permuting the positions of the elements in the corresponding row vector (or group) in accordance with a counting of a column counter 913 , and supplies the generated index to a low address buffer of the address buffer 918 , The column vector permutation block 914 is a Randomizer for permuting the position of the information bits in the group sequentially stored in the order of the input according to a given rule. A RAM (Random Access Memory) 917 temporarily stores data generated in the process of the program. A look-up table 916 stores parameters for nesting and for the root (primitive root). The addresses obtained by row permutation and column permutation (ie the addresses stored in the address buffer 918 ) are used as an address for nesting.

12 shows a flow chart of the modified PIL algorithm. A description below refers to the second stage, Case-B, in the PIL algorithm. As 12 shows, a root g0 of a given random initialization constant table, in step 1011 , selected. After that, in step 1013 , a base sequence C (i) is generated for conversion to random characters of the elements (or information bits) of the group using the following formula. C (i) = [g0 × C (i-1)] mod p, i = 1, 2, 3, ..., p-2, C (0) = 1

After that, in step 1015 , a minimum prime set {q _j , j = 0, 1, 2, ..., R-1} given for the algorithm. Then in step 1017 calculates a prime set {p _j , j = 0, 1, 2, ..., R-1} from the calculated minimum prime set. Next, in step 1019 , the elements of the j-th group are randomized using the following procedure. C j (i) = c ([i × P j ] mod (p-1)), i = 0, 1, 2, 3, ..., p - 2, C j (p - 1) = 0 Here, in order to increase the minimum free space of the turbo-coder while the elements of the group are randomized, a method of B-5-1) to B-5-6) is selected to extract the information bits. that exist at the last position of the frame, to permute (or move) to other positions after interleaving.

B-5-1) means that the positions of the first information bit and the last information bits exchanged in the last group become. B-5-2) means that the last two bits of information exchanged in the last group. B-5-3) means that, for every group, the information bit that exists at the last position, and the information bit that exists at the forefront position be exchanged for each other. B-5-4) means that, for each group, the positions of the last two information bits are exchanged. B-5-5) means that, for each group, an optimal position k for a given interleaving control sought will be to get a position of the information bits that last Position of each row exists, against a position of the information bit, that exists at the position k to exchange. Finally means B-5-6) that, for the last group, an optimal position k for a given interleaving control is looking for a position of the information bits that are at the last position exists, against a position of the information bit, that exists at the position k to exchange.

By Apply the modified algorithm where PIL interleaver is it is possible to prevent a reduction in the free space of the turbo-coder. Table 2 below shows a weight spectrum (Weight Spectrum) of the PIL interleaver before modification and Table 3 below shows a weight spectrum (weight spectrum) of the PIL interleaver after a modification.

In Tables 2 and 3, K indicates the size of the input information frame, Dfree (1) indicates a free space calculated by the CISP for which the input information word is the Hamming weight 1 and Dfree (2) indicates a free space calculated by the CISP for which the input information word has the Hamming weight 2. For example, for K = 600, Dfree (1) of the origi in PIL interleaver indicated by 25/39/49/53/57 / ... in Table 2, and this means that the minimum free distance is 25 and the next minimum free distance is 39.

Similar means Dfree (2) = 38/38/42 / ... that the minimum free distance is 38. Therefore, it is noted that the minimum, free distance is corresponding the free distance determined by the CISP with the Hamming weight 1 becomes. To a reduction in the free distance through the CISP with the Hamming weight 1, uses the invention in this example, the B-5-1) method. That means Dfree (1) improved by removing the CISP with the Hamming weight 1 becomes.

table 2 below presents a weight spectrum of the PIL interleaver a modification

[Table 2]

table 3 below shows a weight spectrum of the PIL interleaver a modification.

[Table 3]

As described above, suppresses the novel turbo-encoder, using the internal interleaver, a decrease in that free space caused by one or more information bits of the Value "1", arranged in the last period of a data frame as input of the component encoder, thereby to an implementation of a turbo coder with a high efficiency contribute.

Claims (4)

A turbo encoder comprising: a first encoder ( 111 ) arranged to encode a frame of input information bits to produce first coded symbols, the frame of input information bits having R groups of C information bits and each group corresponding to a single row ; a two-dimensional interleaver arranged to receive the frame of input information bits, to interleave each row of the frame of input information bits within a row, and then to interleave within a row the position of an information Exchanging bits at a last position of a last row of rows nested within a row for a previous position within the last row of R rows, and a second encoder ( 113 ) arranged to encode the output of the interleaver to produce second coded symbols. The turbo-encoder of claim 1, wherein the interleaver Furthermore, it is set up to interleave each row of the frame of input information bits within a row. Apparatus for interleaving a frame of K information bits, said frame having R groups and each group having C information bits, the apparatus comprising: a two-dimensional interleaver for a turbo-encoder adapted to be input sequentially Information bits of the frame are written to a memory and the positions of the information bits written in a j-th row at position C _j (i) in the series, where j = 0, 1, 2, ..., R - 1, permuted according to an algorithm given by i) permuting a base sequence C (i) = [g0 × C (i-1)] mod p, i = 1, 2, ..., (p-2 ) and C (0) = 1 ii) performing series permutation C _j (i) = C ([i × p _j ] mod (p-1)), j = 0, 1, 2, ..., ( R-1), i = 0, 1, 2, ..., (p-2), C _j (p-1) = 0, and C _j (p) = p iii) exchanging C _R-1 ( p) against C _R-1 (0), where K indicates the number of input information bits in a frame, p a smallest prime number which satisfies 0 ≤ (p + 1) -K / R, g0 indicates an associated root root for p and p _j indicates a prime number set. The device of claim 1, further comprising Randomizer, which is set up that it stores the addresses of the stored information bits according to their exchanged positions.